The present invention pertains to low solids-content slurries for polishing (e.g., chemical mechanical polishing) a substrate comprising a dielectric material and which afford high removal rates while simultaneously affording low defectivities. It also pertains to an associated polishing method using the low solids-content slurries.
Chemical mechanical planarization (chemical mechanical polishing, CMP) is now widely known to those skilled in the art and has been described in numerous patents and open literature publications. An introductory reference on CMP is “Chemical-Mechanical Polish” by G. B. Shinn et al., Chapter 15, pages 415-460, in Handbook of Semiconductor Manufacturing Technology, editors: Y. Nishi and R. Doering, Marcel Dekker, New York City (2000).
In a typical CMP process, a substrate (e.g., a wafer) is placed in contact with a rotating polishing pad attached to a platen. A CMP slurry, typically an abrasive and chemically reactive mixture, is supplied to the pad during CMP processing of the substrate. During the CMP process, the pad (fixed to the platen) and substrate are rotated while a wafer carrier system or polishing head applies pressure (downward force) against the substrate. The slurry accomplishes the planarization (polishing) process by chemically and mechanically interacting with the substrate film being planarized due to the effect of the rotational movement of the pad relative to the substrate. Polishing is continued in this manner until the desired film on the substrate is removed with the usual objective being to effectively planarize the substrate (both metallic and dielectric portions).
In oxide CMP, a slurry is used to planarize films comprised of oxide dielectric material (e.g., silicon dioxide). In shallow trench isolation (STI) CMP, a slurry is used to planarize structures comprised of oxide dielectric material and silicon nitride. Furthermore, it is desired that the oxide CMP and STI CMP slurry compositions and associated methods afford planarized substrates characterized to have low defectivity levels, low haze levels, and low levels of scratching.
During the fabrication of integrated circuit chips, a polishing slurry comprising an abrasive (e.g., a colloidal silica) is utilized to achieve planarization of oxide dielectric layers in case of oxide CMP and metal layers in case of metal CMP. In case of the abrasive being colloidal silica, for example, for high volume manufacturing, chemical mechanical planarization (CMP) of oxide requires 26-32 weight percent of colloidal silica dispersions in order to achieve target removal rates. Using 26-32 weight percent colloidal silica dispersions, the oxide removal rate is typically between 3200 Å/min to 4200 Å/min, which is a standard electronics industry target for oxide CMP. There is a significant need to achieve high oxide removal rates using low-solids contents abrasive dispersions, since this approach can reduce waste handling costs as well as reduce production costs. The present invention provides a solution to this significant need.